UnratedFix available
net: ethernet: cortina: Ack RX overrun interrupt correctly
Type: advisorySources: OSV
In the Linux kernel, the following vulnerability has been resolved: net: ethernet: cortina: Ack RX overrun interrupt correctly The RX overrun interrupt is reported in interrupt status register 4, but gmac_irq() acknowledges it using the RX descriptor error bit from status register 0. For GMAC0 this writes the GMAC1 overrun bit, while for GMAC1 the shift leaves no bit in the 32-bit register. Acknowledge the same per-port RX overrun bit that was detected.
- Products
- Kernel
- Affected versions
- Not specified
- Fixed versions
- 5.10.271, 5.15.222, 6.1.189, 6.12.112, 6.18.54, 6.6.158, 7.2.8
- CVEs
- CVE-2026-98275
- Confirmed fixed CVEs
- Not specified
- Updated in this feed
- 7 Nov 2026, 13:46 UTC · Revision 1
Source evidence
net: ethernet: cortina: Ack RX overrun interrupt correctly
core-osv · Original sourcePublished 6 Oct 2026, 08:45 UTC
In the Linux kernel, the following vulnerability has been resolved: net: ethernet: cortina: Ack RX overrun interrupt correctly The RX overrun interrupt is reported in interrupt status register 4, but gmac_irq() acknowledges it using the RX descriptor error bit from status register 0. For GMAC0 this writes the GMAC1 overrun bit, while for GMAC1 the shift leaves no bit in the 32-bit register. Acknowledge the same per-port RX overrun bit that was detected.
osv:CVE-2026-98275
Kernel
Fixed versions: 5.10.271, 5.15.222, 6.1.189, 6.6.158, 6.12.112, 6.18.54, 7.2.8
Complete source record
{
"id": "704cdc73f4a1b5dde0070ecff1302bc7d9ef84fd3edeb341525c5222f9824e00",
"url": "https://osv.dev/vulnerability/CVE-2026-98275",
"method": "structured",
"payload": {
"kind": "advisory",
"title": "net: ethernet: cortina: Ack RX overrun interrupt correctly",
"summary": "In the Linux kernel, the following vulnerability has been resolved: net: ethernet: cortina: Ack RX overrun interrupt correctly The RX overrun interrupt is reported in interrupt status register 4, but gmac_irq() acknowledges it using the RX descriptor error bit from status register 0. For GMAC0 this writes the GMAC1 overrun bit, while for GMAC1 the shift leaves no bit in the 32-bit register. Acknowledge the same per-port RX overrun bit that was detected.",
"evidence": "osv:CVE-2026-98275",
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"modified": "2026-10-28T02:30:50.888878734Z",
"provider": "osv",
"references": [
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"https://git.kernel.org/stable/c/472493d1d3334d104b9873abc1c2d80ed3b144f3",
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"https://git.kernel.org/stable/c/d72d87926ca33c6766dc73ace46859d7220a45bb",
"https://github.com/CVEProject/cvelistV5/tree/main/cves/2026/98xxx/CVE-2026-98275.json",
"https://nvd.nist.gov/vuln/detail/CVE-2026-98275",
"https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git"
],
"provider_metadata": {
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"osv_generated_from": "https://github.com/CVEProject/cvelistV5/tree/main/cves/2026/98xxx/CVE-2026-98275.json"
}
},
"related_cves": [
{
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"evidence": "/id"
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],
"security_relevant": true,
"severity_evidence": null
},
"source_id": "core-osv",
"document_id": 519512,
"published_at": "2026-10-06T08:45:36.081+00:00"
}