dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read
In the Linux kernel, the following vulnerability has been resolved: dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read There is chip (ls1028a) errata: The SoC may hang on 16 byte unaligned read transactions by QDMA. Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller. Workaround: Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ). Implement this workaround.
- Products
- Kernel
- Affected versions
- Not specified
- Fixed versions
- 5.10.212, 5.15.151, 5.4.271, 6.1.81, 6.6.21, 6.7.9
- CVEs
- CVE-2024-26790
- Confirmed fixed CVEs
- Not specified
- Updated in this feed
- 3 Nov 2026, 08:09 UTC · Revision 1
Source evidence
dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read
core-osv · Original sourcePublished 4 Apr 2024, 08:20 UTC
In the Linux kernel, the following vulnerability has been resolved: dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read There is chip (ls1028a) errata: The SoC may hang on 16 byte unaligned read transactions by QDMA. Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller. Workaround: Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ). Implement this workaround.
osv:CVE-2024-26790
Kernel
Fixed versions: 5.4.271, 5.10.212, 5.15.151, 6.1.81, 6.6.21, 6.7.9
Complete source record
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"title": "dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read",
"summary": "In the Linux kernel, the following vulnerability has been resolved: dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read There is chip (ls1028a) errata: The SoC may hang on 16 byte unaligned read transactions by QDMA. Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller. Workaround: Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ). Implement this workaround.",
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"modified": "2026-10-28T02:30:27.093514978Z",
"provider": "osv",
"references": [
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"security_relevant": true,
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"source_id": "core-osv",
"document_id": 493664,
"published_at": "2024-04-04T08:20:21.742+00:00"
}